HAL MDF initialization and configuration functions migration ¶
The goal of this section is to show how to migrate the MDF Init sequence using STM32CubeMX2:
Open STM32CubeMX2 MDF configuration panel.
Configure the SW layer HAL.
Configure the main MDF features.
Configure the advanced MDF features if needed.
Configure the MDF serial interface features if needed.
Configure the MDF bitstream features if needed.
Configure the MDF short circuit detector features if needed.
Configure the MDF digital filter features if needed.
Configure the MDF out of limit detector features if needed.
Configure the MDF GPIO pins.
Configure the NVIC if the application requires the MDF to be used in IT mode.
Configure the MDF DMA(s) if the application requires the MDF to be used in DMA mode.
Generate the code.
Note
The configuration below might varies from a series to another.
HAL MDF configuration panel ¶
Create a new project with the STM32CubeMX2, then start the initialization and the main configuration.
HAL MDF main features configuration ¶
Configure the MDF main features.
HAL MDF advanced features configuration ¶
Configure the advanced MDF features.
HAL MDF serial interface features configuration ¶
Configure the serial interface configuration of the MDF if needed.
HAL MDF bitstream features configuration ¶
Configure the bitstream configuration of the MDF if needed.
HAL MDF short circuit detector features configuration ¶
Configure the short circuit detector configuration of the MDF if needed.
HAL MDF digital filter features configuration ¶
Configure the digital filter configuration of the MDF if needed.
HAL MDF out of limit detector features configuration ¶
Configure the out of limit detector configuration of the MDF if needed.
GPIO configuration ¶
Configure gpio pins.
DMA configuration ¶
Configure the DMA if needed.
NVIC configuration ¶
Configure the NVIC in case of an interrupt.
HAL ADF initialization and configuration functions migration ¶
The goal of this section is to show how to migrate the ADF Init sequence using STM32CubeMX2:
Open STM32CubeMX2 ADF configuration panel.
Configure the SW layer HAL.
Configure the main ADF features.
Configure the advanced ADF features if needed.
Configure the ADF serial interface features if needed.
Configure the ADF bitstream features if needed.
Configure the ADF digital filter features if needed.
Configure the ADF sound activity detector features if needed.
Configure the ADF GPIO pins.
Configure the NVIC if the application requires the ADF to be used in IT mode.
Configure the ADF DMA(s) if the application requires the ADF to be used in DMA mode.
Generate the code.
Note
The configuration below might varies from a series to another.
HAL ADF configuration ¶
Create a new project with the STM32CubeMX2, then start the initialization and the main configuration.
HAL ADF main features configuration ¶
Configure the ADF main features.
HAL ADF advanced features configuration ¶
Configure the advanced ADF features.
HAL ADF serial interface features configuration ¶
Configure the serial interface configuration of the ADF if needed.
HAL ADF bitstream features configuration ¶
Configure the bitstream configuration of the ADF if needed.
HAL ADF digital filter features configuration ¶
Configure the digital filter configuration of the ADF if needed.
HAL ADF sound activity detector features configuration ¶
Configure the sound activity detector configuration of the ADF if needed.
GPIO configuration ¶
Configure gpio pins.
DMA configuration ¶
Configure the DMA if needed.
NVIC configuration ¶
Configure the NVIC in case of an interrupt.
Generated MDF and ADF initialization and de-initialization sequences ¶
The MDF and ADF initialisation sequence is generated in the
mx_mdf1_init
and
mx_adf1_init
function in
mx_mdf1.c
file and
mx_adf1.c
file under
$YOUR_PROJECT_NAME$/$YOUR_PROJECT_NAME$_SW/generated/STM32Cube_CodeGen.
Related concept:
|
Topic |
Code Snippet HAL1 |
Code Snippet HAL2 |
|---|---|---|
|
MDF Initialization and configuration sequence |
static void MX_MDF1_Init(void)
{
MdfHandle0.Instance = MDF_Filter0;
MdfHandle0.Init.CommonParam.ProcClockDivider = 1;
MdfHandle0.Init.CommonParam.OutputClock.Activation = DISABLE;
MdfHandle0.Init.SerialInterface.Activation = ENABLE;
MdfHandle0.Init.SerialInterface.Mode = MDF_SITF_LF_MASTER_SPI_MODE;
MdfHandle0.Init.SerialInterface.ClockSource = MDF_SITF_CCK0_SOURCE;
MdfHandle0.Init.SerialInterface.Threshold = 4;
MdfHandle0.Init.FilterBistream = MDF_BITSTREAM0_RISING;
/* Initialize the MDF driver handle with the MDF1 instance
Start MDF clock generator
Configure the processing clock divider
Configure and start the serial interface
Configure the bitstream matrix */
if (HAL_MDF_Init(&MdfHandle0) != HAL_OK)
{
Error_Handler();
}
}
void HAL_MDF_MspInit(MDF_HandleTypeDef* hmdf)
{
if(IS_MDF_INSTANCE(hmdf->Instance))
{
/* Peripheral clock enable */
__HAL_RCC_MDF1_CLK_ENABLE();
__HAL_RCC_GPDMA1_CLK_ENABLE();/* MX_DMA_Init */
/* ADF DMA Init */
handle_GPDMA1_Channel0.Instance = GPDMA1_Channel0;
handle_GPDMA1_Channel0.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
handle_GPDMA1_Channel0.Init.Request = DMA_REQUEST_SW;
handle_GPDMA1_Channel0.Init.Direction = DMA_MEMORY_TO_MEMORY;
handle_GPDMA1_Channel0.Init.SrcInc = DMA_SINC_FIXED;
handle_GPDMA1_Channel0.Init.DestInc = DMA_DINC_FIXED;
handle_GPDMA1_Channel0.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_BYTE;
handle_GPDMA1_Channel0.Init.DestDataWidth = DMA_DEST_DATAWIDTH_BYTE;
handle_GPDMA1_Channel0.Init.Priority = DMA_LOW_PRIORITY_LOW_WEIGHT;
handle_GPDMA1_Channel0.Init.SrcBurstLength = 1;
handle_GPDMA1_Channel0.Init.DestBurstLength = 1;
handle_GPDMA1_Channel0.Init.TransferAllocatedPort = DMA_SRC_ALLOCATED_PORT0|DMA_DEST_ALLOCATED_PORT0;
handle_GPDMA1_Channel0.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
handle_GPDMA1_Channel0.Init.Mode = DMA_NORMAL;
if (HAL_DMA_Init(&handle_GPDMA1_Channel0) != HAL_OK)
{
Error_Handler();
}
if (HAL_DMA_ConfigChannelAttributes(&handle_GPDMA1_Channel0, DMA_CHANNEL_NPRIV) != HAL_OK)
{
Error_Handler();
}
HAL_NVIC_SetPriority(GPDMA1_Channel0_IRQn, 0, 0);/* MX_DMA_Init */
HAL_NVIC_EnableIRQ(GPDMA1_Channel0_IRQn);/* MX_DMA_Init */
/* Link the Transmit DMA handle to the MDF handle */
__HAL_LINKDMA(MdfHandle0, hdmaout, handle_GPDMA1_Channel0);
/* MDF1 interrupt Init */
HAL_NVIC_SetPriority(MDF1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(MDF1_IRQn);
}
}
|
hal_mdf_handle_t *mx_Mdf1_init(void)
{
hal_mdf_serial_interface_config_t sitf_1_config;
/* Peripheral clock enable */
HAL_RCC_MDF1_EnableClock();
if (HAL_MDF_Init(&hMDF1, HAL_MDF1) != HAL_OK)
{
return NULL;
}
/* Global MDF1 configuration */
if (HAL_MDF_SetConfig(&hMDF1, 1) != HAL_OK)
{
return NULL;
}
if (HAL_MDF_SetConfigOutputClock(&hMDF1, HAL_MDF_OUTPUT_CLOCK_ALL, 1) != HAL_OK)
{
return NULL;
}
if (HAL_MDF_EnableOutputClock(&hMDF1, HAL_MDF_OUTPUT_CLOCK_ALL) != HAL_OK)
{
return NULL;
}
if (HAL_MDF_Start(&hMDF1) != HAL_OK)
{
return NULL;
}
/* Serial interface 1 configuration */
sitf_1_config.mode = HAL_MDF_SITF_MODE_LF_MASTER_SPI;
sitf_1_config.clock_source = HAL_MDF_SITF_CLOCK_SOURCE_CCK0;
sitf_1_config.threshold = 4U;
if (HAL_MDF_SITF_SetConfig(&hMDF1, HAL_MDF_BLOCK_INDEX_1, &sitf_1_config) != HAL_OK)
{
return NULL;
}
if (HAL_MDF_SITF_Start(&hMDF1, HAL_MDF_BLOCK_INDEX_1) != HAL_OK)
{
return NULL;
}
/* Bitstream matrix 1 configuration */
if (HAL_MDF_BSMX_SetConfig(&hMDF1, HAL_MDF_BLOCK_INDEX_1, HAL_MDF_BLOCK_INDEX_0, HAL_MDF_BSMX_INPUT_RISING) != HAL_OK)
{
return NULL;
}
/* DMA configuration */
HAL_RCC_GPDMA1_EnableClock();
hal_dma_direct_xfer_config_t xfer_cfg_mdf_tx_dma;
if (HAL_DMA_Init(&hGPDMA1_CH0, HAL_GPDMA1_CH0) != HAL_OK)
{
return NULL;
}
xfer_cfg_adf_tx_dma.request = HAL_GPDMA1_REQUEST_MDF1_FLT0;
xfer_cfg_adf_tx_dma.direction = HAL_DMA_DIRECTION_PERIPH_TO_MEMORY;
xfer_cfg_adf_tx_dma.src_inc = HAL_DMA_SRC_ADDR_INCREMENTED;
xfer_cfg_adf_tx_dma.dest_inc = HAL_DMA_DEST_ADDR_FIXED;
xfer_cfg_adf_tx_dma.src_data_width = HAL_DMA_SRC_DATA_WIDTH_BYTE;
xfer_cfg_adf_tx_dma.dest_data_width = HAL_DMA_DEST_DATA_WIDTH_BYTE;
xfer_cfg_adf_tx_dma.priority = HAL_DMA_PRIORITY_LOW_WEIGHT_LOW;
if (HAL_DMA_SetConfigPeriphDirectXfer(&hGPDMA1_CH0, &xfer_cfg_mdf_tx_dma) != HAL_OK)
{
return NULL;
}
/* Enable the interruption for GPDMA1_CH0 */
HAL_CORTEX_NVIC_SetPriority(GPDMA1_CH0_IRQn, HAL_CORTEX_NVIC_PREEMP_PRIORITY_0, HAL_CORTEX_NVIC_SUB_PRIORITY_0);
HAL_CORTEX_NVIC_EnableIRQ(GPDMA1_CH0_IRQn);
/* Link the Transmit DMA handle to the JPEG handle */
HAL_MDF_SetDMA(&hMDF1, HAL_MDF_BLOCK_INDEX_1, &hGPDMA1_CH0);
/* Enable the interruption for MDF*/
HAL_CORTEX_NVIC_SetPriority(MDF1_FLT1_IRQn, HAL_CORTEX_NVIC_PREEMP_PRIORITY_0, HAL_CORTEX_NVIC_SUB_PRIORITY_0);
HAL_CORTEX_NVIC_EnableIRQ(MDF1_FLT1_IRQn);
return &hMDF1;
}
|
|
ADF Initialization and configuration sequence |
static void MX_MDF1_Init(void)
{
AdfHandle0.Instance = ADF_Filter0;
AdfHandle0.Init.CommonParam.ProcClockDivider = 10;
AdfHandle0.Init.CommonParam.OutputClock.Activation = DISABLE;
AdfHandle0.Init.SerialInterface.Activation = ENABLE;
AdfHandle0.Init.SerialInterface.Mode = MDF_SITF_LF_MASTER_SPI_MODE;
AdfHandle0.Init.SerialInterface.ClockSource = MDF_SITF_CCK0_SOURCE;
AdfHandle0.Init.SerialInterface.Threshold = 4;
AdfHandle0.Init.FilterBistream = MDF_BITSTREAM0_RISING;
/* Initialize the MDF driver handle with the MDF1 instance
Start MDF clock generator
Configure the processing clock divider
Configure and start the serial interface
Configure the bitstream matrix */
if (HAL_MDF_Init(&AdfHandle0) != HAL_OK)
{
Error_Handler();
}
}
void HAL_MDF_MspInit(MDF_HandleTypeDef* hmdf)
{
if(IS_ADF_INSTANCE(hmdf->Instance))
{
/* Peripheral clock enable */
__HAL_RCC_ADF1_CLK_ENABLE();
/* DMA configuration */
__HAL_RCC_GPDMA1_CLK_ENABLE();/* MX_DMA_Init */
/* ADF DMA Init */
handle_GPDMA1_Channel0.Instance = GPDMA1_Channel0;
handle_GPDMA1_Channel0.Init.BlkHWRequest = DMA_BREQ_SINGLE_BURST;
handle_GPDMA1_Channel0.Init.Request = DMA_REQUEST_SW;
handle_GPDMA1_Channel0.Init.Direction = DMA_MEMORY_TO_MEMORY;
handle_GPDMA1_Channel0.Init.SrcInc = DMA_SINC_FIXED;
handle_GPDMA1_Channel0.Init.DestInc = DMA_DINC_FIXED;
handle_GPDMA1_Channel0.Init.SrcDataWidth = DMA_SRC_DATAWIDTH_BYTE;
handle_GPDMA1_Channel0.Init.DestDataWidth = DMA_DEST_DATAWIDTH_BYTE;
handle_GPDMA1_Channel0.Init.Priority = DMA_LOW_PRIORITY_LOW_WEIGHT;
handle_GPDMA1_Channel0.Init.SrcBurstLength = 1;
handle_GPDMA1_Channel0.Init.DestBurstLength = 1;
handle_GPDMA1_Channel0.Init.TransferAllocatedPort = DMA_SRC_ALLOCATED_PORT0|DMA_DEST_ALLOCATED_PORT0;
handle_GPDMA1_Channel0.Init.TransferEventMode = DMA_TCEM_BLOCK_TRANSFER;
handle_GPDMA1_Channel0.Init.Mode = DMA_NORMAL;
if (HAL_DMA_Init(&handle_GPDMA1_Channel0) != HAL_OK)
{
Error_Handler();
}
if (HAL_DMA_ConfigChannelAttributes(&handle_GPDMA1_Channel0, DMA_CHANNEL_NPRIV) != HAL_OK)
{
Error_Handler();
}
HAL_NVIC_SetPriority(GPDMA1_Channel0_IRQn, 0, 0);/* MX_DMA_Init */
HAL_NVIC_EnableIRQ(GPDMA1_Channel0_IRQn);/* MX_DMA_Init */
/* Link the Transmit DMA handle to the ADF handle */
__HAL_LINKDMA(AdfHandle0, hdmaout, handle_GPDMA1_Channel0);
/* ADF1 interrupt Init */
HAL_NVIC_SetPriority(ADF1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(ADF1_IRQn);
}
}
|
hal_mdf_handle_t *mx_adf1_init(void)
{
hal_adf_serial_interface_config_t sitf_1_config;
/* Peripheral clock enable */
HAL_RCC_ADF1_EnableClock();
if (HAL_ADF_Init(&hADF1, HAL_ADF1) != HAL_OK)
{
return NULL;
}
/* Global ADF1 configuration */
if (HAL_ADF_SetConfig(&hADF1, 1) != HAL_OK)
{
return NULL;
}
if (HAL_ADF_SetConfigOutputClock(&hADF1, HAL_ADF_OUTPUT_CLOCK_ALL, 1) != HAL_OK)
{
return NULL;
}
if (HAL_ADF_EnableOutputClock(&hADF1, HAL_ADF_OUTPUT_CLOCK_ALL) != HAL_OK)
{
return NULL;
}
if (HAL_ADF_Start(&hADF1) != HAL_OK)
{
return NULL;
}
/* Serial interface 1 configuration */
sitf_1_config.mode = HAL_ADF_SITF_MODE_LF_MASTER_SPI;
sitf_1_config.clock_source = HAL_ADF_SITF_CLOCK_SOURCE_CCK0;
sitf_1_config.threshold = 4U;
if (HAL_ADF_SITF_SetConfig(&hADF1, HAL_ADF_BLOCK_INDEX_0, &sitf_1_config) != HAL_OK)
{
return NULL;
}
if (HAL_ADF_SITF_Start(&hADF1, HAL_ADF_BLOCK_INDEX_0) != HAL_OK)
{
return NULL;
}
/* Bitstream matrix 1 configuration */
if (HAL_ADF_BSMX_SetConfig(&hADF1, HAL_ADF_BLOCK_INDEX_0, HAL_ADF_BLOCK_INDEX_0, HAL_ADF_BSMX_INPUT_RISING) != HAL_OK)
{
return NULL;
}
/* DMA configuration */
HAL_RCC_GPDMA1_EnableClock();
hal_dma_direct_xfer_config_t xfer_cfg_adf_tx_dma;
if (HAL_DMA_Init(&hGPDMA1_CH0, HAL_GPDMA1_CH0) != HAL_OK)
{
return NULL;
}
xfer_cfg_adf_tx_dma.request = HAL_GPDMA1_REQUEST_ADF1_FLT0;
xfer_cfg_adf_tx_dma.direction = HAL_DMA_DIRECTION_PERIPH_TO_MEMORY;
xfer_cfg_adf_tx_dma.src_inc = HAL_DMA_SRC_ADDR_INCREMENTED;
xfer_cfg_adf_tx_dma.dest_inc = HAL_DMA_DEST_ADDR_FIXED;
xfer_cfg_adf_tx_dma.src_data_width = HAL_DMA_SRC_DATA_WIDTH_BYTE;
xfer_cfg_adf_tx_dma.dest_data_width = HAL_DMA_DEST_DATA_WIDTH_BYTE;
xfer_cfg_adf_tx_dma.priority = HAL_DMA_PRIORITY_LOW_WEIGHT_LOW;
if (HAL_DMA_SetConfigPeriphDirectXfer(&hGPDMA1_CH0, &xfer_cfg_adf_tx_dma) != HAL_OK)
{
return NULL;
}
/* Enable the interruption for GPDMA1_CH0 */
HAL_CORTEX_NVIC_SetPriority(GPDMA1_CH0_IRQn, HAL_CORTEX_NVIC_PREEMP_PRIORITY_0, HAL_CORTEX_NVIC_SUB_PRIORITY_0);
HAL_CORTEX_NVIC_EnableIRQ(GPDMA1_CH0_IRQn);
/* Link the Transmit DMA handle to the ADF handle */
HAL_ADF_SetDMA(&hADF1, HAL_ADF_BLOCK_INDEX_0, &hGPDMA1_CH0);
/* Enable the interruption for ADF*/
HAL_CORTEX_NVIC_SetPriority(ADF1_FLT0_IRQn, HAL_CORTEX_NVIC_PREEMP_PRIORITY_0, HAL_CORTEX_NVIC_SUB_PRIORITY_0);
HAL_CORTEX_NVIC_EnableIRQ(ADF1_FLT0_IRQn);
return &hADF1;
}
|
|
MDF DDeinitialization sequence |
void MX_MDF_DeInit(void)
{
if (HAL_MDF_DeInit(&MdfHandle0) != HAL_OK)
{
Error_Handler();
}
}
void HAL_MDF_MspDeInit(MDF_HandleTypeDef* hmdf)
{
if(IS_MDF_INSTANCE(hmdf->Instance))
{
/* Peripheral clock disable */
__HAL_RCC_MDF1_CLK_DISABLE();
/* Disable the interruption for MDF block 0 */
HAL_NVIC_DisableIRQ(MDF1_FLT0_IRQn);
}
}
|
void mx_mdf_deinit(void)
{
(void)HAL_MDF_SITF_Stop(&hMDF1, HAL_MDF_BLOCK_INDEX_0);
(void)HAL_MDF_Stop(&hMDF1);
(void)HAL_MDF_DeInit(&hMDF1);
/* Peripheral clock disable */
HAL_RCC_MDF1_DisableClock();
HAL_RCC_MDF1_Reset();
/* Disable the interruption for MDF block 0 */
HAL_CORTEX_NVIC_DisableIRQ(MDF1_FLT0_IRQn);
}
|
|
ADF Deinitialization sequence |
void MX_ADF_DeInit(void)
{
if (HAL_MDF_DeInit(&AdfHandle0) != HAL_OK)
{
Error_Handler();
}
}
void HAL_MDF_MspInit(MDF_HandleTypeDef* hmdf)
{
if(IS_ADF_INSTANCE(hmdf->Instance))
{
/* Peripheral clock disable */
__HAL_RCC_ADF1_CLK_DISABLE();
/* ADF interrupt DeInit */
HAL_NVIC_DisableIRQ(MDF1_FLT0_IRQn);
}
}
|
void mx_adf_deinit(void)
{
HAL_ADF_SITF_Stop(&hADF1, HAL_ADF_BLOCK_INDEX_0);
HAL_ADF_Stop(&hADF1);
HAL_ADF_DeInit(&hADF1);
/* Peripheral clock disable */
HAL_RCC_ADF1_DisableClock();
HAL_RCC_ADF1_Reset();
/* Disable the interruption for ADF block 0 */
HAL_CORTEX_NVIC_DisableIRQ(ADF1_FLT0_IRQn);
}
|
|
MDF IRQ handle function |
void MDF_FLT0_IRQHandler(void)
{
HAL_MDF_IRQHandler(&MdfHandle0);
}
|
void MDF_FLT0_IRQHandler(void)
{
HAL_MDF_IRQHandler(&hMDF1, HAL_MDF_BLOCK_INDEX_0);
}
|
|
ADF IRQ handle function |
void ADF_IRQHandler(void)
{
HAL_MDF_IRQHandler(&AdfHandle0);
}
|
void ADF_FLT0_IRQHandler(void)
{
HAL_ADF_IRQHandler(&hADF1, HAL_ADF_BLOCK_INDEX_0);
}
|